Description
About the Business Unit:
Ceva is developing the next cellular communication systems, and is targeting a full 5G modem. We are developing state of the art DSP ASIC projects in A.I, Vision, Wireless and Base-stations area. The VLSI verification team is responsible producing a fully verified IP with extra ordinary challenges, working on Functional, Formal and Emulation combined environment.
About the role:
As a verification Engineer you will be a part of the verification team, and work on a full state of the art verification flow from architecture definition, through verification strategy, environment micro ARCH, test plan, functional coverage plan and up to advanced verification sign off process.
Requirements
- B.Sc /M.Sc. graduates in Electrical Engineering from a leading University.
- 3-5 years of experience in Verification.
- Knowledge of SV-UVM, Specman and C++.
- Self-motivated and self-directed, proactive.
- Ability to achieve results in a fast moving, agile flow and dynamic environment, both locally and across the organization.
- Ability to troubleshoot and analyze complex problems.
- Great communication skills.
- Fluent English.
- Team player.